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8080 vs 8086 flags
I'm looking at an old article from IEEE Computer (The October 1980 issue).
The article is "Intel Microprocessors - 8008 to 8086" by Morse, Ravenel,
Mazor, and Pohlman.  It includes this:
==
The 8080 treats the collection of all its flags as a single data item
that can be pushed on or popped off the stack.  The 8086's flag transfer
instructions permit the collection of all the flags to be loaded or stored
as well.  However, these load and store operations involve only the flags
that already exist in the 8080.  This is a concession to compatibility
(without these operations, it would take nine 8086 bytes of code to
perform an 8080 PUSH PSW or POP PSW instruction).
==
I'm not quite sure I follow that.  The 8086 had pushf and popf, right?
What is the "nine 8086 bytes of code to perform an 8080 PUSH PSW"
referring to?



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Old Post
Joseph James Gebis
03-27-04 04:10 AM


Re: 8080 vs 8086 flags
On Fri, 26 Mar 2004 01:23:25 +0000 (UTC), Joseph James Gebis
<gebis@CS.Berkeley.EDU> wrote in comp.lang.asm.x86:

> I'm looking at an old article from IEEE Computer (The October 1980 issue).
> The article is "Intel Microprocessors - 8008 to 8086" by Morse, Ravenel,
> Mazor, and Pohlman.  It includes this:
> ==
> The 8080 treats the collection of all its flags as a single data item
> that can be pushed on or popped off the stack.  The 8086's flag transfer
> instructions permit the collection of all the flags to be loaded or stored
> as well.  However, these load and store operations involve only the flags
> that already exist in the 8080.  This is a concession to compatibility
> (without these operations, it would take nine 8086 bytes of code to
> perform an 8080 PUSH PSW or POP PSW instruction).
> ==
> I'm not quite sure I follow that.  The 8086 had pushf and popf, right?
> What is the "nine 8086 bytes of code to perform an 8080 PUSH PSW"
> referring to?
>

Yes, the 8086 had pushf and popf, but that is not the same as the
8080/8085/Z80 sequence.

The 8080 had 8-bit registers that were pushed and popped in pairs:

BC, DE, HL, PSW

The PSW pair consisted of the 8-bit A register (accumulator) and the
flag register (also 8-bits).  These were always pushed and popped
together.

To write an 8080 simulator (or have one built-in in hardware, like
some of the NEC V series processors did), the 8086 instruction set
included the LAHF and SAHF instructions.

The original x86 16-bit flags register is lead out with the 8080
compatible flags in one 8-bit half, with the bits in the same
positions as they were on the 8080.  The LAHF instruction loads this
8-bit part of the flag register into AH.  The SAHF instruction stores
AH into the same 8-bit portion of the flags or eflags register.

An 8080 simulator would only use AL as an 8-bit accumulator in place
of the A register of the 8080.  So the two instruction sequence:

LAHF
PUSH  AX

...is the equivalent of the 8080's PUSH PSW, and:

POP   AX
SAHF

...is the equivalent of the 8080's POP PSW.

--
Jack Klein
Home: http://JK-Technology.Com
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Old Post
Jack Klein
03-27-04 04:10 AM


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