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Author make and command line variables
Dave Programmer

2007-10-19, 7:09 pm

In a Makefile, I have something like the following:

# makefile start

X = "default_x"
Y = "default_y"

targA:
dosomething -x $(X) -y $(Y)

targB:
$(MAKE) targA X=newX

#makefile end

I'd like to be able to have the option to specify another value of Y
on the command line when making targB and have that passed correctly
to "dosomething"

make targB Y=new_Y

In fact, in my real makefile, I have several such variables I'd like
to be able to modify on the command line. The only way I've been able
to come up with to do this is to modify targB so

targB:
$(MAKE) targA X=newX Y=$(Y)

but this gets unwieldy for several variables. Is there a better way to
do this? Is there a Make macro in which command line variables/macros
are stored?

Måns Rullgård

2007-10-19, 7:09 pm

Dave Programmer <davejavaprogrammer@yahoo.com> writes:

> In a Makefile, I have something like the following:
>
> # makefile start
>
> X = "default_x"
> Y = "default_y"
>
> targA:
> dosomething -x $(X) -y $(Y)
>
> targB:
> $(MAKE) targA X=newX
>
> #makefile end


If you are using GNU make, a more efficient way of achieving the same
thing is like this:

---CUT---
X = default_x
Y = default_y

targA targB:
dosomething -x $(X) -y $(Y)

targB: X=newX
---CUT---

> I'd like to be able to have the option to specify another value of Y
> on the command line when making targB and have that passed correctly
> to "dosomething"
>
> make targB Y=new_Y
>
> In fact, in my real makefile, I have several such variables I'd like
> to be able to modify on the command line. The only way I've been able
> to come up with to do this is to modify targB so
>
> targB:
> $(MAKE) targA X=newX Y=$(Y)
>
> but this gets unwieldy for several variables. Is there a better way to
> do this? Is there a Make macro in which command line variables/macros
> are stored?


The export directive might be what you are looking for.

--
Måns Rullgård
mans@mansr.com
guenther@gmail.com

2007-10-20, 4:18 am

On Oct 19, 5:10 pm, Dave Programmer <davejavaprogram...@yahoo.com>
wrote:
> In a Makefile, I have something like the following:
>
> # makefile start
>
> X = "default_x"
> Y = "default_y"
>
> targA:
> dosomething -x $(X) -y $(Y)
>
> targB:
> $(MAKE) targA X=newX
>
> #makefile end
>
> I'd like to be able to have the option to specify another value of Y
> on the command line when making targB and have that passed
> correctly to "dosomething"
>
> make targB Y=new_Y


Ummm, your existing makefile already supports that. Command-line
assignments are automatically passed to recursive invocations of
'make' via the MAKEFLAGS environment variable.

If your system's version of 'make' doesn't do that, then it does not
comply with the SUS specification for 'make'. If that's the case,
then I would suggest downloading GNU make and using it instead, as it
does comply. For example, here's what GNU make shows on my system
when run with your makefile:

$ gmake targB Y=foo
gmake targA X=newX
gmake[1]: Entering directory `/tmp/f'
dosomething -x newX -y foo
gmake[1]: dosomething: Command not found
gmake[1]: *** [targA] Error 127
gmake[1]: Leaving directory `/tmp/f'
gmake: *** [targB] Error 2


Philip Guenther

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