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Simple retargetable compiler (maybe only local optimizations)
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| Uncle Noah 2006-02-11, 7:01 pm |
| hi there
I have been looking for some time for an easily (not GCC!) retargetable
compiler, generating assembly code for RISC processor ISAs from ANSI C.
This seems to be utopic since in most attempts the specification for
the target processor is tightly integrated in the code generator (e.g.
AST->IR->assembly). Since this is a very difficult problem in practice,
we can exclude some of the hard stuff. Anyway, these are the
requirements:
1. Compact (not obfuscated though!) machine description language.
2. Single file machine descriptions.
3. Support for simple register allocation (not necessarily Chaitin
variation).
4. No (global) optimizations.
The latter is very important; I'm interested in generating correct code
for different instruction sets, BUT don't care about optimizations. If
it look ugly, I will deal with it later.
Any suggestions? LCC looks nice and jackcc has some nice options
(http://jackcc.sourceforge.net) but neither scores all 4 requirements.
cheers
Nikolaos Kavvadias
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| vivekm@sankhya.com 2006-02-14, 7:04 pm |
| Hello ,
Please check SANKHYA Tools Collection.
http://www.sankhya.com/info/products/tools/stc.html
Best Regards,
Vivekanandan M
Sankhya Technologies Private Limited
"Jayashree", Third Floor,
#13/2, First Street, Jayalakshmipuram,
Nungambakkam, Chennai 600 034, INDIA
Tel: +91 (044) 2822 7358
Fax: +91 (044) 2822 7357
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| Uncle Noah wrote:
> I have been looking for some time for an easily (not GCC!) retargetable
> compiler, generating assembly code for RISC processor ISAs from ANSI C.
> This seems to be utopic since in most attempts the specification for
> the target processor is tightly integrated in the code generator (e.g.
> AST->IR->assembly). Since this is a very difficult problem in practice,
> we can exclude some of the hard stuff. Anyway, these are the
> requirements:
>
> 1. Compact (not obfuscated though!) machine description language.
> 2. Single file machine descriptions.
> 3. Support for simple register allocation (not necessarily Chaitin
> variation).
> 4. No (global) optimizations.
>
> The latter is very important; I'm interested in generating correct code
> for different instruction sets, BUT don't care about optimizations. If
> it look ugly, I will deal with it later.
>
> Any suggestions? LCC looks nice and jackcc has some nice options
> (http://jackcc.sourceforge.net) but neither scores all 4 requirements.
I would say lcc meets all four? Unless you don't like its
machine-independent optimisations. All machine-dependent optimisations
are in a 1-file md.
--T
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