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APL2 and dual-core processors
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| Just by mere curiosity, does APL2 for Windows use the biprocessor
feature of processors like the Athlon 64 x2 3800+ ?
I was asked that question, and was not able to answer it. I guess APL2
uses the SSEx facilities, if present, in order to speed up vectorial
processins on a *given* processor, but I wonder whether cache conflicts
would not ruin any productivity gains is the computing load was balanced
over just two processors (I suppose that handling processor affinity
questions is no piece of cake).
Any hints ?
FDA
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| Gilbert Giappesi 2005-12-02, 8:51 pm |
| FDA a écrit :
> Just by mere curiosity, does APL2 for Windows use the biprocessor
> feature of processors like the Athlon 64 x2 3800+ ?
>
> I was asked that question, and was not able to answer it. I guess APL2
> uses the SSEx facilities, if present, in order to speed up vectorial
> processins on a *given* processor, but I wonder whether cache
> conflicts would not ruin any productivity gains is the computing load
> was balanced over just two processors (I suppose that handling
> processor affinity questions is no piece of cake).
>
> Any hints ?
>
> FDA
Hello FDA,
I do have a 2xAthlon/1800with APL2/Win
This is the result of a test with CPU time only (Quad AI [2] )
Processors 0 & 1 ticked :
TEST9. Find 10000 first primes : 41.657 Sec.
Only Processor 0 ticked :
TEST9. Find 10000 first primes : 42.359 Sec.
Only Processor 1 ticked :
TEST9. Find 10000 first primes : 42.109 Sec.
Back again Processors 0 & 1 ticked :
TEST9. Find 10000 first primes : 42.360 Sec.
This clearly indicates that the bi-proc advantage is not not in effect
with APL2/Win
unless I have missed something.
Gilbert
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| Gilbert Giappesi 2005-12-02, 8:51 pm |
| FDA a écrit :
> Just by mere curiosity, does APL2 for Windows use the biprocessor
> feature of processors like the Athlon 64 x2 3800+ ?
>
> I was asked that question, and was not able to answer it. I guess APL2
> uses the SSEx facilities, if present, in order to speed up vectorial
> processins on a *given* processor, but I wonder whether cache
> conflicts would not ruin any productivity gains is the computing load
> was balanced over just two processors (I suppose that handling
> processor affinity questions is no piece of cake).
>
> Any hints ?
>
> FDA
Hello Again FDA,
2xAthlon1800+APL2/Win
I furthermore tried the following.
- Run two sessions in parallel each one on one different processor :
(there is 1 to 2 seconds interval between the 2 starting points.)
Processor 0 :
TEST9. Find 10000 first primes : Compute time: 42.875 Sec. Connect
time: 81.390 Sec
Processor 1
TEST9. Find 10000 first primes : Compute time: 42.281 Sec. Connect
time: 50.156 Sec
This is just to inform you on my findings although I have no idea how
to interpret these figures....
Gilbert
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| David Liebtag 2005-12-02, 8:51 pm |
| APL2 does not exploit multiple processors. Of course, you can run multiple
APL2 sessions and the operating system can dispatch each session to a
different processor.
David Liebtag
IBM APL products and Services
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| Robert Bernecky 2005-12-02, 8:51 pm |
| On Fri, 02 Dec 2005 10:22:29 +0100, FDA wrote:
> Just by mere curiosity, does APL2 for Windows use the biprocessor
> feature of processors like the Athlon 64 x2 3800+ ?
>
> I was asked that question, and was not able to answer it. I guess APL2
> uses the SSEx facilities, if present, in order to speed up vectorial
> processins on a *given* processor, but I wonder whether cache conflicts
> would not ruin any productivity gains is the computing load was balanced
> over just two processors (I suppose that handling processor affinity
> questions is no piece of cake).
1. APL systems are notorious for making EXCELLENT use of cache memory,
so memory bus traffic load, assuming the processor is designed properly,
should not cause performance problems.
2. I'm doing this from memory, but
believe that each Athlon X2 processor has its own L1 and L2 cache.
Hence, the processors are not competing for the same cache memory.
3. Cache conflict, caused by two processors writing to the same
memory cache line, are highly unlikely in an APL environment.
I suppose a poorly designed multi-thread APL system could do this,
by, for example, dividing a matrix operation among two threads by
giving alternate rows to each one, without regard to cache line size,
but can't believe any competent implementor actually doing this.
4. Processor affinity is generally handled by the operating system. This
facility attempts to redispatch interrupted tasks on the same processor
that were running on when interrupted. By doing that, all the good cached
data doesn't have to move from one processor to memory and then to the
other processor. Performance differences when affinity is NOT performed is
Very Noticable at high interrupt rates.
Bob
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| aleph0 2005-12-02, 8:51 pm |
| > 2. I'm doing this from memory, but
> believe that each Athlon X2 processor has its own L1 and L2 cache.
> Hence, the processors are not competing for the same cache memory.
>
Yes, you're right , link :
http://www.hardocp.com/article.html?art=NzY2LDE=
The AMD64 X2 processors ...
- have 2 cores on 1 Die
- each core has it's own Cache
- Memory Controller is on-Die
- Hypertransport for I/O
The 64-bit X86 Intel architecture is quite different and less efficient
in terms of performance and power-consumption FWIW !
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